April 3, 2026 | CEA-Leti, CEA-List and PSMC Collaborate to Integrate RISC-V and MicroLED Silicon Photonics into 3D Stacking and Interposer for Next-Generation AI

CEA-Leti, a world-leading micro & nanotechnologies research institute, and CEA-List, a specialist in smart digital systems, announced a strategic collaboration with Powerchip Semiconductor Manufacturing Corporation (PSMC).

November 14, 2025 | EPI announces the open-source release of the CEA-List VPSim simulator

The European Processor Initiative (EPI) is proud to announce the open-source release of VPSim, the Virtual Prototyping Simulator developed by CEA-List, used for early software-hardware co-validation and performance exploration of the European HPC processor.

J3DAI, an advanced three-layer integration architecture for a CMOS image sensor

Smart imagers are revolutionizing the acquisition and analysis of visual data with real-time image capture and processing capabilities

Risc-V 2025

October 14, 2024 | On a circuit with near-memory computing capabilities