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RISC-V

From March 30 to April 1st CEA, IRT Nanoelec, Inria, and OpenHW Group are organizing the "2nd RISC-V Week" as a phygital event (online and at sites : Rennes, Grenoble & Paris-Saclay)

From 30 Mar. To 01 Apr 2021

RISC-V is a free and open ISA enabling a new era of precessor innovation through open source collaboration. Hardware and software designers, be they industrials, academics, or individuals contributors, collaborate in the development of RISC-V cores, related IP, Tools and software. This Community delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation thanks to open source of both hardware and software.

The program includes tutorials, keynotes, specialized sessions and panels by speakers from: CEA List, CEA Leti, ETH Zürich, UNSW, Google, Thales, Université de Nantes, Bluespec, Inc, Semidynamics Technology Services, Centre national de la recherche scientifique, Carnegie Mellon Université, Huawei, Grenoble INP Esisar, STMicroelectronics, Université Grenoble Alpes, Université Paris-Saclay.

Students, academics and industrials are welcome.

More details and registration