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SESAM: Explore, simulate, and validate complex electronic architectures

SESAM is a digital architecture design environment used to speed up design space exploration (DSE) through simulation and rapid validation. Users can model a complex memory hierarchy and estimate its performance, for example, thanks to a wide variety of available processor and device models.

Use

Helping electronic architecture designers make choices

Electronic systems engineers have to meet a wide array of requirements, from performance, form factor, and cost to power consumption and heat dissipation. This means making an equally wide array of complex architecture choices.

SESAM leverages CEA-List’s embedded systems know-how to help designers quickly explore potential architecture choices so that they can come up with a solution optimized for the target system. It ensures that all requirements—power consumption, energy dissipation, latency, and form factor—are satisfied.

Key SESAM concepts

The SESAM digital architecture design environment enables rapid design space exploration, virtual prototyping, and high-level validation—during the design phase—of complex digital systems.
SESAM addresses all design process steps holistically with:

  • A rich component library for efficient SystemC model construction
  • Rapid (up to 600 MIPS) virtual prototyping simulation
  • Co-simulation with hardware emulation capabilities

It can also estimate extra-functional properties like power and temperature. Finally, SESAM supports the FMI (functional mock-up interface) standard, which means it can interface with other simulation tools so that the behavior of the physical environment can be incorporated into the validation testing of complex cyberphysical systems (CPS).

SESAM also has a virtual prototyping component based on QEMU, an open-source emulator with a variety of processor and other device models, that can model complex memory hierarchies and rapidly generate prototypes. Virtual architecture prototyping based on existing components is done in Python. The Python description abstracts the underlying complexity, making it ideal for design space exploration.

Another way SESAM can improve design quality is by providing an effective selection of architecture solutions. These solutions are based on operational research methods and learning methods. The latter help automate the refinement of temporal and power models from their RTL descriptions, speeding up the design space exploration process.

Speed and interoperability

SESAM offers a number of advantages:

  • Fast DSE to meet designers’ needs
  • An end-to-end environment that covers everything from virtual prototyping to RTL validation
  • SystemC/TLM 2.0 for model interoperability
  • The tool supports the FMI standard so that the behavior of the system’s physical environment can be integrated into validation tests
  • QEMU, with its fast processor simulation capabilities

Transportation, industry, security & defense

SESAM is ideal for the following applications:

  • High-performance computing (HPC): modeling of the future European high-performance processor for the European Processor Initiative (EPI)
  • Transportation: validation of a multi-chip centralized control architecture for a car manufacturer
  • Industry: validation of controller software execution on a virtual integrated circuit platform (digital twin) and FMI co-simulation for modeling of the physical environment’s interactions
  • Security & defense: current leakage assessment for a security analysis
Use case

Modelling the future European high-performance processor for HPC

SESAM is being used to model the extreme-scale HPC MPSoC for the European Processor Initiative (EPI) and to estimate the chip’s performance during the early design phases. The EPI members using SESAM are from academic research and industry.

SESAM is helping speed up the virtual prototype simulation of the architecture being developed. It also helps get maximum performance out of the QEMU fast processor emulator. The technology delivers excellent simulation results, performing 154% better than a sequential solution in terms of millions of instructions per second (MIPS).

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See also

press releases

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