The teams at CEA-List are working on the design of new component architectures, based on chiplets, for the embedded digital systems of the future and for high-performance computing (HPC). The research includes studies into communication infrastructures between chiplets. CEA-List also contributes to the work of the open-source hardware community on these topics.
A current trend in microelectronics is the replacement of large monolithic components – where the entire system is integrated onto a single chip (System-on-Chip or SoC) – with modular component structures based on interconnected microchips, known as ‘chiplets’.
Due to the complexity of their architectures, SoC components are becoming increasingly complicated and costly to design and manufacture. As a result, they are less and less able to meet market needs, particularly in the small- and medium-scale production segments.
In contrast, chiplets, designed to perform basic functions, are small in size and therefore simpler to manufacture. Above all, they can be reused, through assembly, by other components. This makes it possible to share costs.
The trade-off for this flexibility is the need to design communication systems between chiplets within the same component in order to re-aggregate computations and restore the chip’s functional homogeneity. This involves, for example, organising communication to ensure consistency between the cache memories of the various chiplets.
This research programme on architectures aims to design the partitioning of this type of heterogeneous architecture for embedded systems. To this end, CEA-List draws on its expertise across the entire chiplet design chain (regardless of their configuration, whether placed side by side or stacked) and on its know-how in the design of ultra-high-speed communication infrastructures – whether electrical (network-on-chip or NoC) or photonic (optical network-on-chip or ONoC). Its expertise in the design of high value-added specialised circuits is another cornerstone of the programme.
Learn more: CEA Demonstrates First Dynamically Routed Electro-Optical Router for Photonic Interposers and listen to the podcast “Meet Yvain Thonnart, CEA-List | Laser Focus World”
The world of high-performance computing (HPC) is a pioneer in the field of chiplet-based architectures. To achieve their current performance levels (in the order of 10¹⁸ floating-point operations per second), the largest supercomputers have had to move away from the monolithic structure of their thousands of processors. They have turned to modular architectures, which are more energy-efficient and cost-effective.
It was to meet the needs of this sector that teams at CEA-List and CEA-Leti initially worked on chiplet-based architectures. As part of the European ExaNoDe, they demonstrated INTACT, a circuit architecture comprising six stacked chiplets.
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As a member of the RISC-V Fondation and the OpenHW Foundation, CEA-List contributes to the drive for innovation in open-source hardware in Europe. It makes some of its research findings available to the community in order to accelerate the development of high-performance digital systems based on open hardware architectures.
These R&D successes are paving the way for heterogeneous processors that will enable the development of exascale supercomputers. We have demonstrated that the co-optimisation of advanced architectures with 3D integration technologies makes it possible to achieve the levels of computational performance and bandwidth required for HPC.