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Architectures for data-centred computing

Intensive data processing is becoming a key function of digital systems, whether within a computer for AI applications or on an instrumentation chain. By integrating computing functions directly into memory and/or sensors, the CAN programme teams are able to accelerate these processes and reduce their energy consumption.

Data-intensive applications, such as object recognition in an image by an autonomous vehicle, are booming. However, their performance is limited by data transfers within the processor, between the computing unit and the various memory units surrounding it. These operations significantly slow down processing and account for 90 per cent of the component’s power consumption.

CEA-List explores several architectural approaches to overcome these obstacles:

  • The first involves introducing computational functions directly into memory so that they can carry out part of the processing (see the section below on computational SRAM (C-SRAM)).
  • Another approach focuses on designing hardware architectures tailored to the characteristics of the data being processed and the type of applications. CEA-List is therefore developing extended-precision computing accelerators for solving complex equations (see the section below on the VXP accelerator).
  • CEA-List is also working to accelerate artificial intelligence through optimised hardware architectures.

Near-sensor computing

The issue of data transfer also arises in an instrumentation chain. Due to a insufficient bandwidth, the delay in transmitting measurements from the sensor to the processor at the other end of the network often hinders time-critical applications (critical applications, industrial applications, etc.).
To address this need, the List is working on new generations of smart sensors, integrating in-situ signal processing capabilities (see below for a focus on the integration of in-situ signal processing capabilities; see below for a focus on constrained or critical instrumentation chains).

It is in this same spirit that the teams have developed Retine, an imager for embedded systems. Thanks to its multi-layer architecture, this highly dense component remains compact and energy-efficient. It is designed for use in robots, drones, visual inspection systems, etc.

Focus 1

C-SRAM, a computational memory

Computational SRAM is an SRAM memory with computational capabilities that enable it to execute operations directly, without going via the processor. Its use increases the speed of a calculation by a factor of 30 and reduces energy consumption by a factor of 50.

SRAM is a fast memory located close to the processor. The next step will be to integrate computing capabilities into non-volatile memories, which are slower and located further away (such as Flash memory).

Focus 2

An accelerator for extended precision computing (VXP)

VXP is an accelerator for ultra-high-precision computing (up to 512-bit mantissa). It can thus reduce the execution time of complex programmes – such as solvers for scientific applications (simulation, fluid dynamics, computational physics and chemistry) or AI applications – by a factor of three. Its ability to fine-tune precision dynamically makes it particularly well-suited to solve large-scale, ill-conditioned systems of equations. The component integrates seamlessly into data centres alongside central processing units.

A demonstrator has been developed as part of the European EPI programme. It consists of a circuit manufactured using GlobalFoundries’ 22 nm FDX technology, combined with a software stack comprising a compiler and a C-like assembler, a library of mathematical subroutines and a runtime environment.

Learn more:

Focus 3

AI accelerators

The PNeuro Processor:

PNeuro is a fully programmable, energy-efficient hardware accelerator for deep neural networks (DNNs). An industrial transfer was carried out as part of the joint laboratory between CEA-List and Dolphin Design. The collaboration proved successful, as the Tiny Raptor– Dolphin Design’s energy-efficient neural processing IP platform, which incorporates PNeuros – won the ‘Embedded Award 2022’ in the start-up category.

The NeuroCorgi architecture:

CEA-List has designed a silicon chip (ASIC) dedicated to executing AI tasks locally and with exceptional efficiency. With a power consumption of less than 25 mW, it offers a 1,000-fold improvement in energy efficiency compared to off-the-shelf circuits.

Learn more:

Focus 4

Constrained or critical instrumentation chains

In a conventional instrumentation system, calculations are generally centralised and sensors are positioned as close as possible to the measurement point. Constraints relating to bandwidth and the required computing power necessitate a rethink of the instrumentation chain’s architecture, combining computing resources located close to the sensors and/or distributed throughout the system, in order to alleviate data throughput constraints by focusing on pre-processed or the most relevant information.

European programmes

  • EPI: As part of the European Processor Initiative, CEA List is developing an extended-precision accelerator known as VXP.
  • nimble-AI: List provides in-memory computing solutions for data acquisition and neuromorphic processing in a 3D integrated circuit.
  • ANDANTE AI: CEA-List has developed an AI accelerator for artificial neural networks in the Internet of Things.
  • StorAIge: The challenge was to develop and industrialise the 28 nm FD-SOI transistor and integrated phase-change memory in order to create high-performance, ultra-low-power system-on-chip solutions for edge computing applications.
  • The EUpilot : software/hardware co-design to improve application performance and system energy efficiency.
  • Smart Imager (IRT Nanoelec): the CEA is developing the technologies required for the next generation of imagers. These will enable a shift from simply generating images to analysing the information contained within those images, directly on the sensor itself.

The more we equip these storage spaces – which are growing in size and becoming increasingly slow – with computational capabilities, the greater the potential benefit will be.”

Henri-Pierre Charles

Research Director — CEA-List

See also